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5-22
Pull-up Resistor
SV51006
2014.01.10
input signal is present. Because of this, you do not require an external pull-up or pull-down resistor to hold
a signal level when the bus is tri-stated.
For each I/O pin, you can individually specify that the bus-hold circuitry pulls non-driven pins away from
the input threshold voltage — where noise can cause unintended high-frequency switching. To prevent over-
driving signals, the bus-hold circuitry drives the voltage level of the I/O pin lower than the V CCIO level.
If you enable the bus-hold feature, you cannot use the programmable pull-up option. To configure the I/O
pin for differential signals, disable the bus-hold feature.
Pull-up Resistor
Each I/O pin provides an optional programmable pull-up resistor during user mode. The pull-up resistor,
typically 25 k Ω , weakly holds the I/O to the V CCIO level.
The Stratix V device supports programmable pull-up resistors only on user I/O pins but not on dedicated
configuration pins or JTAG pins .
If you enable this option, you cannot use the bus-hold feature.
On-Chip I/O Termination in Stratix V Devices
Dynamic R S and R T OCT provides I/O impedance matching and termination capabilities. OCT maintains
signal quality, saves board space, and reduces external component costs.
The Stratix V devices support OCT in all I/O banks.
Table 5-15: OCT Schemes Supported in Stratix V Devices
Output
Input
Bidirectional
Direction
OCT Schemes
R S OCT with calibration
R S OCT without calibration
R T OCT with calibration
R D OCT (differential LVDS I/O standard only)
Dynamic R S OCT and R T OCT
R S OCT without Calibration in Stratix V Devices
The Stratix V devices support R S OCT for single-ended I/O standards. R S OCT without calibration is
supported on output only.
Table 5-16: Selectable I/O Standards for R S OCT Without Calibration
This table lists the output termination settings for uncalibrated OCT on different I/O standards.
I/O Standard
3.3 V LVTTL/3.3 V LVCMOS
2.5 V LVCMOS
Altera Corporation
Uncalibrated OCT (Output)
R S ( Ω )
25/50
25/50
I/O Features in Stratix V Devices
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